Input-queued switches, output-queued switches and shared memory switches are the dominant switch architectures today. By electing to place queues at the inputs a designer can build the highest speed switches,because the "speed-up" (or memory bandwidth) need not be greater than the fastest line rate. The main problem of input-queued switching is input contention which leads to unpredictable delay. On the other hand, output-queued switches and shared memory switches do not suffer from this and are thus able to provide a better performance. However, they do require the speed-up to at least equal the sum of all the input line rates. And as line rates continue to grow this becomes expensive, and even impossible, to achieve. Thus the key to high-speed, high-performance switches is a combination of input and output queueing.
I will show, by means of examples, counter-examples and proofs, how one may determine an appropriate speed-up and an associated scheduling algorithm to achieve the performance of an output-queued switch at a small increment of the cost of an input-queued switch. An appealing feature of the approach is that it does not require a knowledge of input traffic characteristics. That is, at the right speed-up a single scheduling algorithm may be used to match output-queueing.
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Modified: Jun 24, 1997|
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